I am attempting to implement a PCB trace antenna; namely the sample in this document. Thing is the 1.17 pF for Cp1 is quite hard to achieve in a cost efficient manner with 0603 caps (I loath those smaller beasts that not many hands can solder), and, from the graph in "Figure 13. Loop Antenna Simulated Mag(Zin) vs. CP1" it seems that even a 2% variance in the capacitance would have a great impact.

For these matters I was thinking of extending the proposed solution of adding a printed finger cap on the other side of the main antenna loop, just underneath it (page 27)

enter image description here

with adding more of those finger caps. So that my design would look something like:

enter image description here

i.e. have a bank of 4 such printed finger capacitors of values .01, .02, .04 and .08 pF.

The best deal I could find for the ceramic part of Cp1 was a 1.1 pF with .05 pF tolerance. That means that I would need to cover the range between 0.02 and 0.12 pF with those printed caps in the bank, so with the four values above I shall theoretically match the ceramic's value to the required 1.17 pF to a tolerance of .005 pF by cutting the traces of those finger caps not needed for the compensation. I am assuming here that I will be able to precisely measure the 1.1 pF ceramic.

So this is how I would fix the problem but I don't know whether or not the introduced problems are even bigger. Thinking about more inductance getting introduced maybe ? Any other thoughts on why this may not be a very good idea ?

edit for @tomnexus answer

I still have two problems with the stubs. You see, before the finger-caps bank idea I have also thought about making a big cap and cutting it in marked places - the first problem is the > 10 cm size I would need for it. It is the same problem with the stubs - I have done the maths for Z_0 of 100 Ohms and a velocity factor of 0.82 taken from that same document mentioned above and I got some 16.9 cm for the whole 0.12 pF value. Now I don't have anything close to such dimensions on my PCB. Could I spiral those two lines on the opposite side of the side with the antenna trace (making sure to keep reasonable distances to the antenna traces and in between the stub's curls0) ? And a second problem - I was unable to get any calculators do the Z_0 for these side by side PCB traces. Closest I could find was a copled microstrip line- but that one also has a ground plane on the other side...

  • $\begingroup$ What frequencies are you planning to cover? $\endgroup$ Aug 12, 2017 at 9:38
  • $\begingroup$ @MarcusMüller 433 MHz, sir $\endgroup$
    – kellogs
    Aug 12, 2017 at 11:53

1 Answer 1


Great idea.

Why not just make a single two-wire transmission line, called an open circuit stub, and cut it to length with a knife.

$Z=-jZ_0Cot(\beta l)$ or
$C=1/{\omega Z_0 Cot(\beta l)}$

where $\beta=2 \pi/\lambda$ and $\omega = 2 \pi f$
and $Z_0 ≈ 100 \Omega$ for a pair of 1 mm lines 1 mm apart, but use an online calculator to find a more accurate paired strip impedance.

Put little distance marks and numbers down in the soldermask to guide you.

You may have reproducibility problems unless you control the PCB dielectric constant, etching, plating and masking/coating very carefully. A plain process on FR4 will vary a lot. Keeping a wider gap, one PCB thickness or more, will make it less sensitive to the dielectric constant.

0.005 pF is an impossible tolerance IMHO. Just calculate the drift in capacitance caused by a few degrees temperature change, affecting the dielectric or even the mechanical spacing. Besides, it implies you are aiming for a tuning accuracy of one part in 300, which is almost unheard of in antennas.
As an example, a very high Q "small" loop for 3 MHz might have a bandwidth of 10 kHz, which is a Q of 300. But it will be made of thick copper, and will require constant re-tuning as its dimensions shift around. Good enough for a live operator to use, but it wouldn't work for unattended use without an automatic tuner.

  • $\begingroup$ Thanks! I did not know about these stubs; these seem to eliminate the parasitic inductive issue with the right cuts :). Could you check out my edit please ? $\endgroup$
    – kellogs
    Aug 12, 2017 at 14:42
  • $\begingroup$ Your calculations sound OK, but yes 16 cm is too long. You could spiral it up, but it would break the symmetry of the loop. But if you have double-sided board, of well controlled impedance, you can lower Z0 quite a lot, probably getting it down to 20 ohms with wide tracks. These could extend both sides of the loop. Finally, you could use the loop traces themselves to hide the capacitance - imagine a loop where the bottom traces overlapped, like one turn of a helix. $\endgroup$
    – tomnexus
    Aug 12, 2017 at 20:23
  • $\begingroup$ actually I have redone the calculations a dozen more times and the new stub length for 0.12 pF is 2.95 mm. Way too low to be further trimmed by cutter. Going for a Z_0 of 80 Ohm and the full 1.17 pF value of Cp1 would require a 22.544 mm stub. Pretty good, but - what kind of quality factor will this stub-capacitor have ? Will I be really OK with it ? $\endgroup$
    – kellogs
    Aug 13, 2017 at 8:47
  • $\begingroup$ of course it is not, I still would not be able to trim-tune it. $\endgroup$
    – kellogs
    Aug 13, 2017 at 9:15
  • $\begingroup$ FR4 loss tangent they say is 0.018, so I guess the capacitor Q will be limited to < 50. I'm sure it's worse than a ceramic capacitor. And there will be some radiation from your lines. But you're making an antenna, with tons of radiation resistance, so a modest-Q capacitor probably won't cost you much performance. That white paper is very good, try the sums to see where you end up. $\endgroup$
    – tomnexus
    Aug 13, 2017 at 20:06

You must log in to answer this question.

Not the answer you're looking for? Browse other questions tagged .