I am looking for a simple schematic for building an effective RF detector which can trigger a GPIO. The goal is to (passively?) detect a 10 mW RF signal (10% duty cycle) and have that raise voltage on a pin to somewhere north of 0.5V within 2 seconds of the signal going live.
I have some Avago/Broadband/Agilent/HP HSMS-2855 chips coming my way, which I understand are wonderfully good zero-bias RF detectors. However, it's not clear to me whether I can slap a random antenna on and go have some fun, or if I still need to pay careful attention to impedance matching, filtering, etc...
I have read An Ultra-Low Power Wake-Up Receiver for Real-time constrained Wireless Sensor Networks, but the pictured board shows a complex PCB with a high part count and large footprint.
Radio-Triggered Wake-Up for Wireless Sensor Networks is wonderfully well written and gives great hand-holding in case the designer wants to add range. However, Figure 3, where it gives a simple RF detector schematic, is confusing to the layman because there's no ground drawn to the antenna [Update: see comment section below]. Here's Figure 3 from that paper:
Design Optimization and Implementation for RF Energy Harvesting Circuits (related spinoff papers 1 and 2) is another very well written resource, diving into fascinating detail on practical optimality choices, but it does not present the final tested schematic.
I'm hoping this is the RF detector equivalent of a paperweight, that is to say there's no need for refinement, it doesn't matter if it's ugly, and there's almost no way to do it wrong.
Typically, one would want an OOK stage in order to disambiguate between other signals which might trigger a false positive, but because in my application the nearest possible source of EM radiation is hundreds of meters away, and because the consequences of a false positive-- even if it's tens of times a day-- are negligible there's much less need for complexity. KISS, price, and compactness are higher priorities.