I draw two possible architectures for Software Defined Radios below.
In the first architecture, I,Q signals are generated at the mixer stage and two ADCs are required. The FPGA down-samples the samples from ADCs and forwards them the USB PHY. Digital Down Conversion is not mandatory in this design (pls correct me if I am wrong).
In contrast to the first design, the second architecture has only 1 ADC. It only creates the I,Q signals inside the FPGA with the help of DSP. The ADC samples at 2x the max frequency present at the input of the Mixer to avoid aliasing.
I am curious to know why an engineer should opt to go ahead with the 1st design over the 2nd design. It seems USRP N210 is having a very similar architecture to the first. So what disadvantages does the second design (I already know ADC needs to be 2X speed, so neglecting that fact) bring to the designer?
Also, what are some reasons to chose the second design?
Thanks for answering my questioning mind!